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一种基于线性反馈移位寄存器的轻量级强PUF 设计

  

  1. 1. 国防科技大学计算机学院,湖南 长沙 410073;
    2. 信息工程大学洛阳校区基础系,河南 洛阳 471003
  • 出版日期:2020-02-29 发布日期:2020-03-11
  • 基金资助:
    国家自然科学基金项目(61832018)

A lightweight strong physical unclonable function design based on LFSR

  1. 1. School of Computer, National University of Defense Technology, Changsha Hunan 410073, China;
    2. Department of Basic Courses, Information Engineering University, Luoyang Henan 471003, China
  • Online:2020-02-29 Published:2020-03-11

摘要: 物理不可克隆函数(PUF),是一种新型硬件安全原语,可以用FPGA 和ASIC 实现,
避免芯片被过度制造和非法克隆。PUF 可以用于安全密钥生成和芯片认证,强PUF 是其中一种
重要的分类,强PUF 具有极大的CRP 空间,适用于设备实体的安全认证。经典的以仲裁器PUF
为代表的强PUF 设计面积开销大,唯一性不够理想,难以在一些资源集约的场景,如嵌入式系
统和物联网(IoT)设备中应用。为了减小硬件开销,提出了一种新型轻量级强PUF 设计,该设计
利用线性反馈移位寄存器对弱PUF 的输出响应进行混淆以获得大量的输出响应,结构简单,易
于实现。在28 nm 的FPGA 上实现并评估了该PUF 设计。实验结果表明,该PUF 的随机性为
49.8%,唯一性为50.25%,硬件开销很小。

关键词: 硬件安全, 物理不可克隆函数, 线性反馈移位寄存器, FPGA, 轻量级

Abstract: Physical unclonable function (PUF) is a new type of hardware security primitive. It
prevents chips from over-manufacturing and illegally copying and can be implemented with ASICs
and FPGAs. PUF can be used for secure secret key generation and chips authentication. Strong PUF
is an important category of PUF and it has a great CRP space for safety authentication of device
identity. As a classic strong PUF design, arbiter PUF is expensive in hardware overhead and less ideal
in uniqueness, which makes it not suitable for some resource-intensive applications like embedded
systems and IoT devices. To decrease the hardware overhead, a new lightweight strong PUF design
has been proposed. A linear feedback shift register is used as obfuscating logic of a weak PUF to
obtain lots of responses. With simple structure, this design is easy to implement. The PUF design is
implemented and evaluated on a 28 nm FPGA developing board. The experimental results show that
the randomness of the PUF is 49.8%, the uniqueness is 50.25%, and the hardware overhead is very
small.

Key words: hardware security, physical unclonable function, linear feedback shift register, FPGA;
lightweight